Serail In – Serial Out | Student Projects https://studentprojects.in Microcontroller projects, Circuit Diagrams, Project Ideas Sat, 09 Jun 2012 09:33:22 +0000 en-US hourly 1 https://wordpress.org/?v=6.1.7 Verilog HDL Program for Serail In – Serial Out Shift Register https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-for-serail-in-serial-out-shift-register/ https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-for-serail-in-serial-out-shift-register/#comments Sat, 09 Jun 2012 09:33:22 +0000 http://studentprojects.in/?p=3234 Verilog HDL Program for Serail In – Serial Out Shift Register. module sipo(sout,sin,clk); output [3:0]sout; input sin,clk; dff2 u1(sout[0],sin,clk); dff2 u2(sout[1],sout[0],clk); dff2 u3(sout[2],sout[1],clk); dff2 u4(sout[3],sout[2],clk); endmodule

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]]> Verilog HDL Program for Serail In – Serial Out Shift Register.

 
module sipo(sout,sin,clk);
    output [3:0]sout;
    input sin,clk;
    dff2 u1(sout[0],sin,clk);
    dff2 u2(sout[1],sout[0],clk);
    dff2 u3(sout[2],sout[1],clk);
    dff2 u4(sout[3],sout[2],clk);
endmodule
Simulated Waveform for Serail In – Serial Out Shift Register
Simulated Waveform for Serail In – Serial Out Shift Register

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