or gate | Student Projects https://studentprojects.in Microcontroller projects, Circuit Diagrams, Project Ideas Sat, 09 Jun 2012 08:59:44 +0000 en-US hourly 1 https://wordpress.org/?v=6.1.7 Verilog HDL program for OR Logic gate https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-or-logic-gate/ https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-or-logic-gate/#respond Thu, 31 May 2012 13:17:37 +0000 http://studentprojects.in/?p=2972 The OR gate is a digital logic gate that implements logical disjunction. A HIGH output (1) results if one or both the inputs to the gate are HIGH (1). If neither input is HIGH, a LOW output (0) results. In another sense, the function of OR effectively finds the maximum between two binary digits, just

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]]> The OR gate is a digital logic gate that implements logical disjunction. A HIGH output (1) results if one or both the inputs to the gate are HIGH (1). If neither input is HIGH, a LOW output (0) results. In another sense, the function of OR effectively finds the maximum between two binary digits, just as the complementary AND function finds the minimum.

module or1 (c,a,b);
   output c;
   input a,b;
   assign c=a|b;
endmodule
Simulated waveform for OR Gate
Simulated waveform for OR Gate

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