HALF ADDER | Student Projects https://studentprojects.in Microcontroller projects, Circuit Diagrams, Project Ideas Sat, 09 Jun 2012 08:55:38 +0000 en-US hourly 1 https://wordpress.org/?v=6.1.7 Verilog HDL Program for HALF ADDER https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-for-half-adder/ https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-for-half-adder/#respond Thu, 31 May 2012 13:57:20 +0000 http://studentprojects.in/?p=2998 The half adder adds two one-bit binary numbers A and B. It has two outputs, S and C (the value theoretically carried on to the next addition); the final sum is 2C + S. The simplest half-adder design, pictured on below, incorporates an XOR gate for S and an AND gate for C. With the

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]]> The half adder adds two one-bit binary numbers A and B. It has two outputs, S and C (the value theoretically carried on to the next addition); the final sum is 2C + S. The simplest half-adder design, pictured on below, incorporates an XOR gate for S and an AND gate for C. With the addition of an OR gate to combine their carry outputs, two half adders can be combined to make a full adder.
Half Adder
Half Adder

module ha(s,co,a,b);
    output s,co;
    input a,b;
    xor1 u1(s,a,b);
    and1 u2 (co,a,b);
endmodule
Simulated waveform for Half Adder
Simulated waveform for Half Adder

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