Design and Verification of a PCI Based System using SystemC

2.3.2. Slave module :

The slave carries out transactions as requested by the master. Since we have declared the AD lines as int, it is not possible to extract individual bits from this signal. Thus it cannot be connected to DEVSEL# port of any of the slaves which is necessary during configuration transaction to select a particular. Since we have to configure the slave before using it we decided on assigning the slaves address during instantiation. We use this address to select a slave during configuration.

There are seven input/output port of which two AD and C_BE are of type int , six FRAME, PAR, IRDY, TRDY, STOP, DEVSEL are of type bool , one output port Data_in of type int, one input port IDSEL is of type bool, one clock port clock .

There are seven events trdy_a, trdy_d, devsel_a, devsel_d, ad and monitor.
The processes and functions that help the slave achieve this are listed below :

2.1 void Recieve_1(void);
This function is registered as SC_METHOD process and is sensitive to the positive edge of the clock. This process is responsible for most of the working of the slave.

2.2 void init(void);
This function is registered as a SC_METHOD and in sensitive to none. It is used to initialize the private variables of the slave module.

2.3 void Abort(void);
This function performs certain abort conditions depending on the condition sent by the monitor. It is called every time DEVSEL# is asserted.

2.4 void parity_fun(void);
This function is registered as a SC_METHOD and is sensitive to the event par . This process generates the parity when a read transaction occurs i.e. when the slave write the data into the bus.

2.5 void parity_check(void);
This function is used to check for parity of AD and C/BE lines. It sets a condition based on which the slave decides whether to assert or not to assert PARR#.

2.6 void Check(void);
This function is used to check whether the address kept on the Ad lines by the master belongs to it or no.

2.7 void t_d_a(void);
This function is used to notify two events trdy_a and devsel_a depending on whether it is read transaction or a write transaction.

2.8 void t_a(void);
This function is registered as SC_METHOD process and is sensitive to trdy_a. It is used to assert TRDY#.

2.9 void t_d(void);
This function is registered as SC_METHOD process and is sensitive to trdy_d. It is used to deassert TRDY#.

2.10 void d_a(void);
This function is registered as SC_METHOD process and is sensitive to devsel_a. It is used to assert DEVSEL#.

2.11 void d_d(void);
This function is registered as SC_METHOD process and is sensitive to devsel_a. It is used to deassert DEVSEL#.

2.12 void s_a(void);
This function is registered as SC_METHOD process and is sensitive to stop_a. It is used to assert STOP#.

2.13 void s_d(void);
This function is registered as SC_METHOD process and is sensitive to stop_d. It is used to deassert STOP#.

2.14 void pr_a(void);
This function is registered as SC_METHOD process and is sensitive to perr_a. It is used to assert PERR#.

2.15 void pr_d(void);
This function is registered as SC_METHOD process and is sensitive to perr_d. It is used to deassert PERR#.

2.16 void p_a(void);
This function is registered as SC_METHOD process and is sensitive to parr_a. It is used to assert PAR.

2.17 void p_d(void);
This function is registered as SC_METHOD process and is sensitive to par_d. It is used to deassert TRDY#.

2.18 void pr_y(void);
This function is registered as SC_METHOD process and is sensitive to perr_y. It is used create a parity error which is used during the verification process.

2.19 void notification(void);
This function is registered as SC_METHOD process and is sensitive to monitor. It is used to place the data that is to be stored in the memory modeled in the monitor along with the destination address into Channel2 and also sets status bits to tell the monitor that a valid information is kept on the channel.

2.3.3.Arbiter module :

The arbiter is used to decide which requesting master should be given the permission for accessing the bus.

The arbiter consist of eight ports of which REQ1#, REQ2#, REQ3#, FRAME#, IRDY# are input ports and GNT1#, GNT2#, GNT3# are output ports. There are two events frame and grnt.
The processes and functions that are used in this module are as listed below :

3.1 void arbit(void);
This function is registered as SC_METHOD process and is sensitive to IRDY#. The present function notifies an event frame .

3.2 void init(void);
This function is registered as SC_METHOD process and is sensitive to the event grnt. It is used to assert GNT# in case more than one master has requested for the bus at the same time.

3.3 void init1(void);
This function is registered as SC_METHOD process and is sensitive to REQ1#, REQ2# and REQ3#. Its function is similar to that of the above function.

3.4 void d_gnt(void);
This function is registered as SC_METHOD process and is sensitive to the event frame. The present function is used to deassert the grant that had been asserted earlier.

2.4 Testbench

Testbenches are used to provide stimulus to a design under test and check design results. It consists of a module Driver, three ports one of type inter1 named Drive, two are input ports Data_in and sig which are of the type int and bool respectively. It contains two processes, driver and monitor. The process(Master) sends the corresponding command and results are checked in
another process(Monitor). These two processes are registered as SC_THREAD.

Along with two processes this testbench makes use of seven functions. These are listed below:

1. void driver(void);
Initially it calls the send function to configure six slaves by keeping slave address, base address and configuration write command. Next it calls testbench function where the different transactions are initiated.

2. void monitor(void);
Memory modeling is done here. All data which are received from slave gets saved in this memory. This function sends the data that are sent/received from/in the Slaves to the function m_check.

3. void send(int , int, int, int, bool, bool, bool);
This function first creates an information packet by calling yet another function req. After creating Packet it writes the packet into the channel and updates its status bits. Finally it comparers two arrays were sent and received data are stored, to check whether the data transactions were successful or not.

4. void req(int,int,int,int,int);
This function creates packets of information depending on the parameters sent from the function ‘send’

5. void testbench(void);
There are many files which includes testbench function, were different testcases are defined. This function calls the send function.

6. void d_check(int);
This function saves the data that has been sent or received from/by the driver. The data thus stored is compared later.

7. void d_check(int);
This function saves the data sent or received from/by the slave. This function is similar to the above function.

8. void Abort(void);
This function is used to inform the slave what abort condition is to be implied.

2.5 FILES and FOLDERS

5.1 bin

1. main.cpp

5.2 log

1. exe.txt
2. 2 log.txt

5.3 include

1. Arbiter.h
2. Master.h
3. Channel1.h
4. Channel2.h
5. Slave.h
6. Structure.h

5.4 src

1. Arbiter.cpp
2. Master.cpp
3. Channel1.cpp
4. Channel2.cpp
5. Slave.cpp

5.5 runfiles

1. run.csh

5.6 verify

• testbench
• – include
• – – Top.h
• – src
• – – Top.cpp
• driver
• – include
• – – Driver.h
• – src
• – – Driver.cpp

3 testcases

1. Read.cpp
2. Write.cpp
3. Read_Write.cpp
4. Multiple_Masters_Read_Write.cpp
5. Multiple_Masters_write.cpp
6. Multiple_Masters_read.cpp
7. Io_Read_write.cpp
8. Memory_Read_write.cpp
9. Master_Abort.cpp
10. Target_Abort.cpp
11. Target_Abort_With_Data.cpp
12. Target_Abort_Without_Data.cpp
13. Wait_Irdy_Trdy.cpp
14. Wait_Irdy.cpp
15. Wait_Trdy.cpp
16. Retry.cpp
17. Parity_Error_Write.cpp
18. Parity_Error_Read.cpp
19. Write_Master_Abort_Read.cpp