8051/8951 microcontroller Instruction Set

CJNE dest-byte, src-byte, target

Function : Compare and jump if not equal

Flags : CY

Description: CJNE compares the magnitudes of the first two operands, and branches if their values are not equal. The branch destination is computed by adding the signed relative displacement in the last instruction byte to the PC, after incrementing the PC to the start of the next instruction. The carry flag is set if the unsigned integer value of dest-byte is less than the unsigned integer value of src-byte; otherwise, the carry is cleared. Neither operand is affected.

The first two operands allow four addressing mode combinations: the accumulator may be compared with any directly addressed byte or immediate data, and any indirect RAM location or working register can be compared with an immediate constant.

1. Immediate:              CJNE A, #data, target

Example: CJNE A, #40, GO            ; JUMP if A is not 40

2. Direct:                     CJNE A, direct, target

Example: CJNE A, 20H, GO          ; JUMP if A !=(20H)

3. Register:                  CJNE Rn,#data,target

Example: CJNE R5,#70,GO           ;jump if R5 is not 70

In the fourth addressing mode, any RAM location can be destination. The RAM location is held by register R0 or R1.

4. Register-indirect:     CJNE @Ri,#data,target

Example: CJNE @R1,#40,GO         ;Jump if RAM location whose address is held by R1 is not equal to 40.

CLR A

Function: Clear accumulator

Flags: None are affected

Description: The accumulator is cleared (all bits set to zero).

Example: The accumulator contains 5CH. The instruction CLR A will leave the accumulator set to 00H

CLR bit

Function: Clear bit

Flags: None are affected

Description: The indicated bit is cleared (reset to zero).  CLR can operate on the carry flag or any directly addressable bit.

Example: Port 1 has previously been written with 5DH (01011101B). The instruction CLR P1.2 will leave the port set to 59H (01011001B).

CPL A

Function: Complement accumulator

Flags: None are affected

Description: Each bit of the accumulator is logically complemented (one’s complement). Bits which previously contained a one are changed to zero and vice versa.

Example: The accumulator contains 5CH (01011100B). The instruction CPL A will leave the accumulator set to 0A3H (10100011 B).

CPL bit

Function: Complement bit

Flags: None are affected

Description: The bit variable specified is complemented. A bit which had been a one is changed to zero and vice versa. CPL can operate on the carry or any directly addressable bit.

Example: Port 1 has previously been written with 5DH (01011101B).

The instruction sequence

CPL P1.1

CPL P1.2

will leave the port set to 5BH (01011011B).

DA A

Function: Decimal adjust accumulator after addition

Flags: CY

Description: DA A adjusts the eight-bit value in the accumulator resulting from the earlier addition of two variables (each in packed BCD format), producing two four-bit digits. Any ADD or ADDC instruction may have been used to perform the addition. If accumulator bits 3-0 are greater than nine (1010-1111), or if the AC flag is one, six is added to the accumulator producing the proper BCD digit in the low order nibble. This internal addition would set the carry flag if a carry-out of the low order four-bit field propagated through all high-order bits, but it would not clear the carry flag otherwise. If the carry flag is now set, or if the four high-order bits now exceed nine (1010-1111), these high-order bits are incremented by six, producing the proper BCD digit in the high-order nibble. Again, this would set the carry flag if there was a carryout of the high-order bits, but wouldn’t clear the carry. The carry flag thus indicates if the sum of the original two BCD variables is greater than 100, allowing multiple precision decimal addition. OV is not affected. All of this occurs during the one instruction cycle. Essentially; this instruction performs the decimal conversion by adding 00H, 06H, 60H, or 66H to the accumulator, depending on initial accumulator and PSW conditions.

Note:  DA A cannot simply convert a hexadecimal number in the accumulator to BCD notation, nor does DA A apply to decimal subtraction.

Example:     MOV A, #47H
ADD A, #38H
DA A

Result:        47H
+ 38H
———–
7FH          (invalid BCD)
06H          (after DA A)
———–
85H          (valid BCD)
———–

In the above instruction, since the lower nibble was greater than 9, DA added 6 to A. If the lower nibble is less than 9 but AC=1, it also adds 6 to the lower nibble.

DEC byte

Function: Decrement

Flags: None

Description: The variable indicated is decremented by 1. An original value of 00H will underflow

to 0FFH. Four operand addressing modes are allowed:

1. Accumulator:        DEC A

2. Register:               DEC Rn

3. Direct:                  DEC direct

4. Register-indirect:    DEC @Ri

DIV AB

Function: Divide

Flags: CY and OV

Description: DIV AB divides the unsigned eight-bit integer in the accumulator by the unsigned eight-bit integer in register B. The accumulator receives the integer part of the quotient; register B receives the integer remainder. The carry and OV flags will be cleared.

Exception: If B had originally contained 00H, the values returned in the accumulator and B register will be undefined and the overflow flag will be set. The carry flag is cleared in any case.

Example:      MOV A,#35
MOV B,#10
DIV AB

Result:          A=3 and B=5

DJNZ byte, target

Function: Decrement and jump if not zero

Flags: None

Description: DJNZ decrements the location indicated by 1, and branches to the address indicated by the second operand if the resulting value is not zero. An original value of 00H will underflow to 0FFH. The branch destination would be computed by adding the signed relative-displacement value in the last instruction byte to the PC, after incrementing the PC to the first byte of the following instruction.

The following two formats are supported by this instruction.

1. Register:       DJNZ Rn, target

Example: DJNZ R3, HERE

2. Direct:          DJNZ direct, target

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INC  byte

Function: Increment

Flgs: None

Description: INC increments the indicated variable by 1. An original value of 0FFH will overflow to 00H.

Four operand addressing modes are allowed:

1. Accumulator:        INC A

2. Register:               INC Rn

3. Direct:                  INC direct

4. Register-indirect:   INC @Ri

Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins.

INC DPTR

Function: Increment data pointer

Flags: None

Description: Increment the 16-bit data pointer by 1. A 16-bit increment (modulo 216) is performed; an overflow of the low-order byte of the data pointer (DPL) from 0FFH to 00H will increment the high- order byte (DPH). This is the only 16-bit register which can be incremented.

Example:      MOV DPTR, #16FFH       DPTR=16FFH
INC DPTR

Result:         DPTR=1700H

JB bit, target

Function: Jump if bit is set

Flags: None

Description: If the indicated bit is a one, jump to the target address indicated; otherwise proceed with the next instruction. The branch destination is computed by adding the signed relative-displacement in the third instruction byte to the PC, after incrementing the PC to the first byte of the next instruction. The bit tested is not modified.

Example:
SETB P1.2                 ; Make P1.2 an input port
HERE:       JB P1.2,HERE            ; stay here as long as P1.2=1
MOV P2,#20H            ; Since P1.2=0 send 55H to P2

JBC bit, target

Function: Jump if bit is set and clear bit

flags: None

Description: If the indicated bit is one, branch to the target address while at the same time clear the designated bit. The branch destination is computed by adding the signed relative displacement in the third instruction byte to the PC, after incrementing the PC to the first byte of the next instruction.

Note: When this instruction is used to test an output pin, the value used as the original data will be read from the output data latch, not the input pin.

JC target

Function: Jump if carry is set

Flags: None

Description: If the carry flag is set, branch to the target address indicated; otherwise proceed with the next instruction.

JMP @A + DPTR

Function: Jump indirect
Flags: None

Description: The JMP instruction is an unconditional jump to a target address. The target address provided by the total sum of register A and the DPTR register.

JNB bit, target

Function: Jump if bit is not set

Flags: None

Description: If the indicated bit is a zero, branch to the target address; otherwise proceed with the next instruction. The branch destination is computed by adding the signed relative-displacement in the third instruction byte to the PC, after incrementing the PC to the first byte of the next instruction. The bit tested is not modified.

Example:
SETB P1.2                 ; Make P1.2 an input port
HERE:       JNB P1.2,HERE         ; stay here as long as P1.2=0
MOV P2,#20H            ; Since P1.2=1 send 55H to P2

JNC target

Function: Jump if carry is not set

Flags: None

Description: If the carry flag is a zero, branch to the target address ; otherwise proceed with the next instruction. The branch destination is computed by adding the signed relative-displacement in the second instruction byte to the PC, after incrementing the PC twice to point to the next instruction. The carry flag is not modified.

JNZ target

Function: Jump if accumulator is not zero
Flags; None

Description: If any bit of the accumulator is a one, branch to the indicated address; otherwise proceed with the next instruction. The branch destination is computed by adding the signed relative-displacement in the second instruction byte to the PC, after incrementing the PC twice. The accumulator is not modified.

JZ target

Function: Jump if accumulator is zero

Flags: None

Description: If all bits of the accumulator are zero, branch to the address indicated; otherwise proceed with the next instruction. The branch destination is computed by adding the signed relative-displacement in the second instruction byte to the PC, after incrementing the PC twice. The accumulator is not modified. No flags are affected.

LCALL 16-bit addr

Function: Long call

Flags: None

Description: LCALL calls a subroutine located at the indicated address. The instruction adds three to the program counter to generate the address of the next instruction and then pushes the 16-bit result onto the stack (low byte first), incrementing the stack pointer by two. The high-order and low-order bytes of the PC are then loaded, respectively, with the second and third bytes of the LCALL instruction. Program execution continues with the instruction at this address. The subroutine may therefore begin anywhere in the full 64 Kbyte program memory address space.

Example: Initially the stack pointer equals 07H. The label ”SUBRTN” is assigned to program memory location 1234H. After executing the instruction LCALL SUBRTN at location 0123H, the stack pointer will contain 09H, internal RAM locations 08H and 09H will contain 26H and 01H, and the PC will contain 1234H.

LJMP 16-bit addr

Function: Long jump

Flags: None

Description: LJMP causes an unconditional branch to the indicated address, by loading the high order and low-order bytes of the PC (respectively) with the second and third instruction bytes. The destination may therefore be anywhere in the full 64K program memory address space.

Example: The label ”JMPADR” is assigned to the instruction at program memory location 1234H. The instruction LJMP JMPADR at location 0123H will load the program counter with 1234H.