8051/8951 microcontroller Instruction Set

Here Instructions are explained in alphabetical order.

Acall  targetaddress

Function : Absolute call

Flags : None

Description: ACALL unconditionally calls a subroutine located at the indicated address. The instruction increments the PC twice to obtain the address of the following instruction, then pushes the 16-bit result onto the stack (low-order byte first) and increments the stack pointer twice. The destination address is obtained by successively concatenating the five high-order bits of the incremented PC, op code bits 7-5, and the second byte of the instruction.

The subroutine called must therefore start within the same 2K block of program memory as the first byte of the instruction following ACALL. No flags are affected.

Example: Initially SP equals 07H. The label “SUBRTN” is at program memory location 0345H. After executing the instruction ACALL SUBRTN at location 0123H, SP will contain 09H, internal RAM location 08H and 09H will contain 25H and 01H, respectively, and the PC will contain 0345H.

Operation: ACALL

(PC) ← (PC) + 2
(SP) ← (SP) + 1
((SP)) ← (PC7-0)
(SP) ← (SP) + 1
((SP)) ←(PC15-8)
(PC10-0) ← page address
Bytes: 2
Cycles: 2

ADD A, sourse byte

Function : Add

Flags : OV, AC, CY

Description: ADD adds the byte variable indicated to the accumulator, leaving the result in the accumulator. The carry and auxiliary carry flags are set, respectively, if there is a carry out of bit 7 or bit 3, and cleared otherwise. When adding unsigned integers, the carry flag indicates an overflow occurred. OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry out of bit 7 but not out of bit 6; otherwise OV is cleared. When adding signed integers, OV indicates a negative number produced as the sum of two positive operands, or a positive sum from two negative operands. Four source operand addressing modes are allowed: register, direct, register indirect, or immediate.

Example:    mov A,#45H          ; A = 45H
add A,#4FH

Result:       A = 94H, CY = 0.

The following addressing modes are supported for the ADD instruction.
1. Immediate:            ADD A, #data

Example: ADD A,#40H

2. Register:               ADD A, Rn

Example: ADD A,R1

3. Direct:                  ADD A, direct

Example: ADD A, 20H              ;Add data in RAM location 20H to A

4. Register-indirect:    ADD A,@Ri

Example: ADD A,@R0             ;Add to A data pointed by R0

ADDC A,  source byte

Function : Add with carry

Flags : OV, AC, CY

Description: ADDC simultaneously adds the byte variable indicated, the carry flag and the accumulator contents, leaving the result in the accumulator. The carry and auxiliary carry flags are set, respectively, if there is a carry out of bit 7 or bit 3, and cleared otherwise. When adding unsigned integers, the carry flag indicates an overflow occurred.

OV is set if there is a carry out of bit 6 but not out of bit 7, or a carry out of bit 7 but not out of bit 6; otherwise OV is cleared. When adding signed integers, OV indicates a negative number produced as the sum of two positive operands or a positive sum from two negative operands.

Four source operand addressing modes are allowed: register, direct, register indirect, or immediate.

Example:       mov a, #0C3H                  ; (A) ← 0C3H
mov R0,#0AAH                ; (R0) ← 0AAH  assume (CY) = 1
ADDC A, R0

Result :         (A) = 6EH with (AC) = 0, (CY) = 1, (OV) = 1.

The addressing modes for ADDC are same as for ADD A,byte.

AJMP target address

Function : Absolute jump

Flags : None

Description: AJMP transfers program execution to the indicated address, which is formed at runtime by concatenating the high-order five bits of the PC (after incrementing the PC twice), op code bits 7-5, and the second byte of the instruction. The destination must therefore be within the same 2K block of program memory as the first byte of the instruction following AJMP.

Example: The label ”JMPADR” is at program memory location 0123H. The instruction AJMP JMPADR is at location 0345H and will load the PC with 0123H.

ANL dest-byte, src-byte

Function : Logical AND for byte variables

Flags : None

Description: ANL performs the bitwise logical AND operation between the variables indicated and stores the results in the destination variable. No flags are affected. The two operands allow six addressing mode combinations. When the destination is a accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the accumulator or immediate data.

Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins.

Example: If the accumulator holds 0C3H (11000011B) and register 0 holds 0AAH(10101010B) then the instruction ANL A,R0 will leave 81H (10000001B) in the accumulator.

For an ANL instruction there are a total of six addressing modes.

1. Immediate:         ANL A, #data

Eample : ANL A,#30h

2. Register:             ANL A, Rn

Example : ANL A, R5

3. Direct:               ANL A,direct

Example : ANL A,20H     ; AND A with data in RAM location 20H

4. Register-indirect: ANL A, @Ri

Example : ANL A,@R1   ; AND A with data pointed by R0

In the next two addressing modes the destination is direct address while the source is either A or immediate data.

5. ANL direct,A

Example : ANL 20H, A

6. ANL direct, #data

Example : ANL 40H, #30H

ANL C, src-bit

Function : Logical AND for bit variables

Flags : CY

Description: In this instruction the carry flag bit is ANDed with a source bit and the result is placed in carry. If the Boolean value of the source bit is a logic 0 then clear the carry flag; otherwise leave the carry flag in its current state. Only direct bit addressing is allowed for the source operand. A slash (”/”) preceding the operand in the assembly language indicates that the logical complement of the addressed bit is used as the source value, but the source bit itself is not affected.