nand gate | Student Projects https://studentprojects.in Microcontroller projects, Circuit Diagrams, Project Ideas Sat, 09 Jun 2012 08:57:46 +0000 en-US hourly 1 https://wordpress.org/?v=6.1.7 Verilog HDL Program for NAND Logic Gate https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-for-nand-logic-gate/ https://studentprojects.in/electronics/verilog-hdl/verilog-hdl-program-for-nand-logic-gate/#respond Thu, 31 May 2012 13:32:42 +0000 http://studentprojects.in/?p=2982 The Negated AND, NOT AND or NAND gate is the opposite of the digital AND gate, and behaves in a manner that corresponds to the opposite of AND gate. A LOW (0) output results only if both the inputs to the gate are HIGH (1); if one or both inputs are LOW (0), a HIGH

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]]> The Negated AND, NOT AND or NAND gate is the opposite of the digital AND gate, and behaves in a manner that corresponds to the opposite of AND gate. A LOW (0) output results only if both the inputs to the gate are HIGH (1); if one or both inputs are LOW (0), a HIGH (1) output results.

The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness.

module nand1(c,a,b);
    output c;
    input a,b;
    wire d;
    and1 u1(d,a,b);
    inv u2(c,d);
endmodule
Simulated waveform for Nand Gate
Simulated waveform for Nand Gate

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